Drowsiness warning system prevents traffic accidents of two students
With a compact, easy-to-use design, the drowsiness warning system using FPGA is considered highly feasible and easy to install in cars.
The two students who invented this unique product are Nguyen The Duc and Ho Van Chuong from the Faculty of Electricity and Electronics (Duy Tan University, Da Nang).
“Watch out for drivers falling asleep”
Sharing about the features of this product, Chuong said that to carry out this project, you must use the Terasic DE10-Nano support toolkit, combined with machine learning technology.
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| Student group Nguyen The Duc and Ho Van Chuong are being guided by engineer Ta Quoc Viet (standing) to complete the product. |
In addition, image processing technology and SVM algorithm must also be used.
“When the system is installed in the vehicle, the camera facing the driver will capture the driver's facial image.
The algorithms programmed into the system are responsible for detecting eye blinking in real time.
Through the surveillance camera by detecting and comparing the most recent facial state in the database storage, to provide parameters on eye opening with continuous image sequence analysis at a rate of 5 frames/second.
After detecting signs of driver drowsiness, the system will have speakers emit warning signals.
In addition, the system also records the driver's fatigue frequency each hour and calculates the probability to give warnings in advance, helping to prevent traffic accidents.
“To complete the project, we applied the knowledge we learned about Microcontrollers and Embedded Systems.
At the same time, combine support tools to create products that run stably and accurately," Duc shared.
To create this product, Chuong and Duc's team spent a lot of time working and researching in the lab and laboratory.
Working hard with the machines and calibration equipment, many days this couple left school when it was already night.
Although it was tiring and hard, it was the passion for research and exploration that helped create this "drowsy driver monitoring" system.
“We are lucky to have the support of experienced lecturers with good professional knowledge.
Especially the dedicated help of Master Tran Le Thang Dong and Engineer Ta Quoc Viet, to create a product with very good results like today", Duc expressed.
Compete in the international arena
After a period of experimentation and calculation with precise parameters, the product "drowsiness warning system using FPGA" represented Duy Tan University to participate in the Intel Innovative FPGA 2017 competition in Asia organized by Intel & Terasic Corporation (USA).
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| Drowsiness warning system using FPGA is installed on cars to prevent traffic accidents. |
This contest creates opportunities for everyone from students, engineers, professors to companies operating in the field of Embedded Systems manufacturing to freely design and create.
“Intel Innovative FPGA 2017” started in December 2017 and was divided into 4 regions, including: America, Europe-Middle East, China and Asia-Pacific.
In the Asia-Pacific region, there were more than 100 topics submitted by students, engineers and businesses.
Right from the first rounds, the products of two Vietnamese students, Nguyen The Duc and Ho Van Chuong, received special attention from the judges.
“The jury highly appreciated the product for its necessity and feasibility in contributing to safe driving.
At the same time, the product has flexibly used algorithms to bring optimal efficiency to the system...
"It's great that our project is the only Vietnamese project to make it into the Top 8 excellent projects and win the prize at this competition," Duc said.